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ASIC Case Studies
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Case Studies



  • Physical Design for a Digital Video flip-chip SoC
    Our physical design team was responsible for implementing the top level hierarchical netlist to GDSII More...

  • OSI-SoC Design
    The design had 4-clock domain, 3 Million gates, 78 memory blocks and works at the maximum frequency of 278 MHz. more...

  • DDR IO Cell Model Development
    The DDR IO Cell is a high-performance, low latency controller interface to DDR-based DRAM memory system. The general-purpose cell is independent of logical memory controller design, enabling support for a wide variety of memory applications that need high bandwidth and low latency. more...

  • Module level verification of Packet Processing SoC
    In contrast to a packet processor, a p2SoC includes seamless integration of packet processor, traffic manager, switch fabric, and security processor to enable glue less system design for next generation enterprise switches. more....

  • Digital TV IC verification
    - Fully integrated, cost effective solution for Digital TVs - Digital signal processing and display device, the transmission path is as wells - The first digital audio, video processor with both PCI and Ethernet support - A single low-power, low-cost chip implementation for Television - Compatible with DVD, audio/video streams more....

  • OC-48 Framer / Mapper Verification
    Verification environment development and validation of a high-density, combination OC-48 framer, multichannel HDLC communication controller and ATM cell delineator ASIC of 35 million gate density. more....

  • Network Co-processor SoC
    Verification of the blocks of Network Co-processor SoC covering BFM implementation, complete system-level co-verification and Regression Suite development within a scheduled time frame. more....

  • Packet Express (ATM SAR and Traffic Manager)
    Design and in-depth verification of ATM SAR - The design consisted of Utopia interface and customized processor interface to data exchanges to other chips and software. The chip works at 133 MHz with 64 bits data bus width.. more....

  • Full custom Macro Design
    The project involved development of a full custom macro using TSMC 90nm technology. The goal was to develop high speed, low power viterbi decoder macro using the minimum die area within 6 months. more....

  • Verification of OC-192 line card framer chip
    -SONET/SDH/OTN framer/mapper chip with virtual concatenation to contiguous concatenation conversion and reverse support -Verification environment development for functional verification at block level and mini chip level - Using SONET eVC, UPI eVC, Scoreboard eVC in environment - Tools: Specman, Modelsim . more....

  • Cell library conversion
    The library to be converted consisted of custom cells, made up by using 0.25 um technology. The cells were of varying types consisting from the simple "via chains" to "diodes", "resistors", "capacitors", "pnp junctions" and "FET based" to complex "memory cells" and "ring oscillators". more....

  • Verification of PVR on a chip
    This product is for home PC users who crave superior home theater experience on their computers. This next generation video-processing chip delivers higher quality and low cost PC video solutions. more...

  • Verification of high speed router SoC
    We set up a complete Specman verification environment towards developing a complete data path platform solution for OC192c/10G Ethernet more....

  • Verification of networking SoC
    We served High Sigma (Zero Defect) quality SoC verification services for a chip-set, multi-million gate VLSI devices targeted for storage area networking (SAN) needs. With multiple Giga-bits/second throughput, the SoC delivers scalability, portability and comprehensive solutions as per the need. more....

  • DSP Controller core
    In-depth verification of DSP Controller Core that involved the development of various drivers, monitors and checkers. The core consisted of an advanced DSP processor with modem control interface. more....

  • Physical (Post-fabricated silicon) verification of Internet Telephony SoC
    We performed a thorough verification of a 17 Million gates Internet telephony manager SoC on a board containing taped out Silicon sample within a scheduled time frame. more....

Embedded Case Studies







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