The IDCT is a transform that converts a signal from frequency to spatial domain.

The IDCT core is used for Video coding systems based on the baseline JPEG and implements 8x8 two-dimensional Inverse Discrete Cosine Transform.

The data input into the core is a block of 8x8 samples. The two-stage process performs the transform as two separate one-dimensional transforms.

This results in a set of intermediate results being produced, which require storage and further processing. There is a latency of 74 clock cycles before which the first output sample appears at the output.

Consequently, there is a similar latency of 74 clock cycles between the last input data and the last output data.

Features

• Fully synchronous with asynchronous reset and without internal tri-state buffers
• IDCT input precision 11 bits; output precision 8 bits
• High clock speed and low gate count
• Internal block Ram of FPGA used
• Input scanning format: row-by row
• Latency of 74 clock cycles
• Suitable for JPEG
• Test benches & reference modules provided